Multi-phase ring oscillators, as e.g. used in multi-phase phase-locked loop circuits, are typically used in receivers of high-speed serial links for the phase adjustment of the sampling clock. They provide multiple phases to a phase interpolator or phase rotator which in turn provides the sampling clock in a clock data recovery circuit. Other fields of application are phased-array antenna systems, where high-frequency multi-phase clock generation is also required.
Multi-phase generation is typically implemented by means of a ring oscillator including two or more delay cells interconnected to form a ring, so that such a device naturally provides multiple phases at each tap/output of the delay cells. The concatenation of delay cells, i.e. ring of delay cells, oscillates at a frequency proportional to 1/N, where N is the number of delay cells in the ring, and allows for increasingly high frequencies with a decreasing number of delay cells. However, the more phases the application requires, the higher the number of delay cells must be chosen, so that the oscillation frequency is substantially reduced. Thus, it is generally difficult to design a high-frequency multi-phase generator having a reasonable number of phase shift taps.
U.S. Pat. No. 8,624,645 discloses a multi-phase clock signal generator including a ring phase-shifting loop having a plurality of output terminals and phase-shifting units for phase shifting in input clock signals to generate output clock signals with different phases, wherein the output clock signals are respectively output at different output terminals respectively located between the phase-shifting units.
U.S. Pat. No. 7,315,219 discloses a multi-phase voltage-controlled oscillator for providing a plurality of signals having the same frequency but different phases according to a control voltage. The multi-phase voltage-controlled oscillator includes a plurality of ring oscillator units, each having a plurality of phase delay elements and a plurality of first connecting nodes, wherein the phase delay elements in each of the ring oscillator units are electrically series-connected to one another through the first connecting nodes and a single resistor ring having a plurality of resistor elements and a plurality of second connecting nodes, wherein the resistor elements are electrically series-connected to one another through the second connecting nodes. The second connecting nodes are electrically connected to the first connecting nodes of the ring oscillator units, so that the first connecting nodes of the ring oscillator units provide a plurality of signals having the same frequency but different phases. One disadvantage of the disclosed multi-phase voltage-controlled oscillator is that it has a high complexity of the circuitry and a poor phase accuracy since the resistor network introduces a mutual dependency between the individual VCOs.
U.S. Pat. No. 8,624,645 discloses a multi-phase clock signal generator, including: a ring phase shifting loop including a plurality of controllable delay cells, for generating output clock signals having different phases via the controllable delay cells according to a input clock signal, wherein delay amount of the controllable delay cells are determined by a biasing voltage; a phase skew detecting circuit, for computing phase differences of the output clock signals to generate a phase skew detecting signal; and a biasing circuit for providing the biasing voltage according to the phase skew detecting signal.